1. Field of the Invention
The present invention relates to a multilayer capacitor and a mounted structure thereof.
2. Related Background Art
The voltage is becoming more and more lowered in power sources for supplying power to a central processing unit (CPU) mounted on digital electronic equipment, while the load current is increasing. Therefore, it became very difficult to control variation in supply voltage to within tolerances against rapid change of the load current, and a multilayer capacitor called a decoupling capacitor has been used as connected to a power source. An electric current is supplied from this multilayer capacitor to the CPU upon transient variation of the load current, so as to suppress the variation in supply voltage.
As the operating frequency of the CPU is becoming higher and higher in recent years, the load current is becoming higher in speed and larger in magnitude and there are demands for reduction in the equivalent series inductance (ESL) of the multilayer capacitor used as the decoupling capacitor. In order to meet such demands, Patent Document 1 discloses the multilayer capacitor in which a plurality of terminal electrodes are so arranged that the polarities of adjacent terminal electrodes are opposite to each other to cancel magnetic fields generated, thereby reducing the equivalent series inductance.
[Patent Document 1] Japanese Pat Application Laid-Open No. 2000-208361